FlagOS Daily Intelligence Report (2026-11-04)
Research window: 2026-11-03 06:00 ~ 2026-11-04 06:00 (Beijing time, 24 hours; continuing from the cutoff of the previous daily report).
Sources: GitHub (full audit of 61 repos under org: flagos-ai, 228 commits, 177 merged PRs, 271 in-review PRs updated within the window, 117 newly opened, pushes to 24 repos, atomic audit of Releases in 31 repos and Tags in 8 repos), Google News RSS (24 sets of Chinese and English query terms, via proxy), HN Algolia (8 sets), CSDN FlagOS column (each article time-verified), BAAI Community (see the appendix source list for details).
Index for This Issue
- Today’s Highlights: vLLM 0.28 line closes out four backends on the same day; FlagGems lands 23 benchmark migrations in two minutes; 2.3.0 adds the fifth layer for CANN 9.2.1 (11-03)
- I. Open-Source Project Progress (GitHub Activity)
- 1.1 Org cadence: pushes to 24 repos, 228 commits, 177 merged, 1602 in review org-wide (11-03 ~ 11-04)
- 1.2 Release side: 2.3.0 adds the fifth layer for CANN 9.2.1; base image deliberately ships without FlagTree (11-03)
- 1.3 vLLM 0.28 line closes out four backends on the same day: Tsingmicro, MetaX C550, Moore Threads MUSA, Ascend decode graph (11-03)
- 1.4 FlagGems benchmark reference: 23 merged in two minutes, H800 reference reads unified into a single JSON (11-03)
- 1.5 FlagGems KernelGen: Iluvatar BI-V150 ten in ten minutes, NVIDIA twelve, Kunlunxin and Enflame each add a segment (11-03)
- 1.6 FlagQuantum: boolean register selection moves into the qfunc/Qmod frontend, Pauli SELECT lowered to gate level (11-03)
- 1.7 Training and operator libraries: TransformerEngine adds a Biren SUPA backend, FlagTensor adds MUSA, Megatron hooks up DSv4 (11-03)
- 1.8 Fused communication operators: RS+add+RMSNorm+AG ring kernel enters FlagGems and the SGLang plugin (11-03)
- 1.9 Supporting infrastructure: optest Feishu notifications carry test summaries, FlagTree CI migrates to Feishu Bitable, FlagQAI tightens the macOS sandbox (11-03)
- II. News Coverage and Ecosystem
- 2.1 Channel audit: zero component-level hits across 24 query sets, no new articles on CSDN or HN within the window (11-04)
- 2.2 Industry side: member organizations win Outstanding Contribution Awards at the Wuzhen Summit, Enflame Technology lists on the A-share market (11-03)
- III. Deep Dive on Member Organizations and Backend Vendors
- 3.1 Tsingmicro: TXDA does only eager on 0.28, explicitly rejecting graph mode (11-03)
- 3.2 MetaX: C550’s 0.28 is an “empty adaptation”, all changes stay inside the plugin (11-03)
- 3.3 Moore Threads: MUSA 0.28 brings in native MCCL and segmented graphs in one go (11-03)
- 3.4 Ascend: 0.28 decode graph, CANN 9.2.1 base, INT8 BMM, and 910C CI advance on four fronts (11-03)
- 3.5 Iluvatar, Kunlunxin, Enflame, XuanTie, Hygon, and Horizon: batch operator additions on one side, continued tuning on the other (11-03)
- IV. Summary and Trend Observations
- Appendix: Source audit table, complete source list
Today’s Focus: vLLM 0.28 line closes four backends on the same day; FlagGems merges 23 benchmark migrations in two minutes; 2.3.0 adds CANN 9.2.1 as the fifth layer (11-03)
Date: 2026-11-03 Sources: vllm-plugin-FL PR #642 · vllm-plugin-FL PR #554 · vllm-plugin-FL PR #575 · vllm-plugin-FL PR #646 · FlagGems PR #8294 · build-infra PR #1614 (see appendix for the full list)
- Inference line: vLLM 0.28.0 was closed out by four backends — Tsingmicro, MetaX, Moore Threads, and Ascend — within a single day, totaling +17,051 / -789 lines across 150 files. Each of the four took a different shape: Tsingmicro removed graph mode entirely and kept only eager; MetaX did an “empty adaptation” with no vendor 0.28 path in place; Moore Threads brought in native MCCL along with segmented graphs; Ascend added a decode-specific graph. One upstream version, four landing strategies — a sign that FlagOS multi-chip adaptation has entered a phase of “accounting per backend” rather than “copying a template.”
- Operator line: FlagGems merged 23 PRs within two minutes, at 16:41 and 16:42, of which 21 came from the same author and all migrated per-backend benchmark reference-data loading from scattered readers to a unified JSON. This is not feature development but infrastructure for evaluation comparability — cross-backend scores only mean something when reference values come from the same dataset. FlagGems merged 76 PRs in total for the day, 42.9% of the organization’s 177.
- Version line: build-infra #1614 adds the fifth base image layer for 2.3.0, CANN 9.2.1 (910B only, python 3.12, torch 2.13, and triton_ascend 3.6.0), and #1615 then backfills that layer’s changelog date to match the registry push time. At the image level, 2.3.0 now covers base, Cambricon neuware 4.4.3, MetaX maca 3.8.1.3, Hygon dtk26.10, AMD rocm7.2.4, and Ascend CANN 9.2.1, but the community
release/2.3manifest still returns 404 — the release has yet to clear the manifest-freeze step. - Assessment: The day saw 177 merges, 117 new PRs, and 271 updates to PRs under review within the window, with 1,602 PRs under review organization-wide. Versus the previous window (162 merges, 192 new PRs), merges rose 9.3% and new PRs fell 39.1%, marking the first sign that the review side is “consuming faster than producing.” The drop in new PRs, however, comes mainly from the FlagGems repo alone (77 PRs, 59 of them from a single author) and does not indicate cooling overall demand.
I. Open-Source Project Progress (GitHub Activity)
1.1 Organizational cadence: 24 repos pushed, 228 commits, 177 merged, 1,602 PRs under review org-wide (11-03 ~ 11-04)
Date: 2026-11-03 ~ 2026-11-04 Source: flagos-ai org repositories · commit search · merged PR search · open PR search
- Repo side: 24 of 61 repos saw pushes in the window, the highest in two weeks. Ordered by push recency: vllm-plugin-FL, FlagTree, FlagQuantum, FlagTensor, FlagGems, TransformerEngine-FL, release-info, build-infra, Trident, docs, optest, Megatron-LM-FL, FlagDNN, FlagGems-vllm, FlagTrain, Torch-FL, FlagGems-sglang, FlagCX, FlagAttention, FlagSparse, FlagQAI, sglang-plugin-FL, OpenCourse, flir. The release-info push is still an automated
gh-pagesdeployment with no source changes. - Commit side: the commit search returned 228 hits, split as FlagQuantum 108, FlagGems 47, FlagQAI 12, FlagGems-sglang 9, FlagSparse 8, FlagGems-vllm 8, optest 7, build-infra 5, FlagTensor 5, FlagDNN 4, FlagCX 3, FlagTree 3, FlagTrain 3, Torch-FL 2, FlagAttention 2, flir 1, sglang-plugin-FL 1. The quantum stack alone accounts for 47.4%, up slightly from 44.9% last period.
- Merge side: 177 merged PRs from 19 repos: FlagGems 76, FlagQuantum 28, vllm-plugin-FL 14, FlagGems-sglang 9, FlagGems-vllm 8, FlagTree 8, optest 7, FlagQAI 6, build-infra 5, FlagTrain 3, FlagCX 3, Torch-FL 2, FlagAttention 2, and 1 each for FlagTensor, Megatron-LM-FL, TransformerEngine-FL, FlagSparse, sglang-plugin-FL, and flir. This is the broadest backend and component coverage in a recent merge distribution.
- Review side: 271 open PRs were updated in the window, 117 newly opened. By repo: FlagGems 146 (77 new), FlagGems-vllm 30 (9), FlagTree 28 (5), vllm-plugin-FL 17 (8), sglang-plugin-FL 8 (3), Torch-FL 7 (1), FlagTrain 6 (3), FlagAttention 4, flir 3 (1), FlagQuantum 3 (3), FlagCX 3 (2), FlagScale 3, docs 3 (1), Trident 2, FlagDNN 2 (1), Megatron-LM-FL 1 (1), TransformerEngine-FL 1, optest 1 (1), build-infra 1, FlagQAI 1 (1), FlagTree-AscendNPU-IR 1. Under the current search criteria, the org-wide open PR backlog stands at 1,602, a merged-to-open ratio of roughly 1:9.
- Author side: on the merge side, FlagQuantum (bot account) 36, lukatao 33, youseeyouonedayday 12, xuanzhengdu-eng 10, wuwentao 8, physics31415926 6, github-actions bot 6. On the new-open side, youseeyouonedayday alone opened 59, 50.4% of the day’s new PRs, followed by SeddonShen 4, tonyh168 4, FlagQuantum 4, lukatao 3, Kaiwen1024 3.
- Comparison: the previous window (11-02 06:00 ~ 11-03 06:00) had 162 merges, 192 new opens, and 311 open PRs updated in-window. This window: merges up 9.3%, new opens down 39.1%, in-window open updates down 12.9%. Together the three point to the same thing: review is accelerating through the backlog, while the absolute volume of new development tickets is dominated by FlagGems alone.
1.2 Release side: 2.3.0 adds a fifth layer for CANN 9.2.1; base image deliberately ships without FlagTree (11-03)
Date: 2026-11-03 Source: build-infra PR #1614 · build-infra PR #1615 · build-infra PR #1613 · community 2.2 release manifest
- New base layer: #1614 adds
base/ascend-cann9.2.1(aarch64 + ubuntu 24.04, 910B only), with the CANN 9.2.1 toolkit, 910B ops package, NNAL, and the existing/etc/profile.d/vendor.shenvironment capture, plus aconfigs.yamlrow, acann921runner override, and a verify node alias. +198 lines, 5 files. - Why python 3.12: the PR body states two hard constraints — on flagos-pypi-ascend, the wheels for torch 2.13, torch-npu 2.13, torchvision 0.28, and torchaudio 2.11 are cp312-only; and CANN’s
set_env.shinjects its bundled python tree intoPYTHONPATH, so the base interpreter must exactly match the runtime venv or imports will cross versions. Accordingly triton is pinned at 3.6.0 with triton_ascend 3.6.0 layered on top, and numpy is pinned at 1.26.4. - Why FlagTree and FlagCX are deliberately omitted: FlagTree has no version pin for CANN 9.2.x yet, and there is no matching flagcx wheel for 9.2.1, so this layer leaves
flagtree,flagcx,env.app, anddeps_appall empty, and the build order becomes base → runtime without FlagTree → FlagTree builder → FlagTree wheel → refresh runtime. Whenflagtreeis absent, the compiler falls back to triton. - Version tagging: #1615 is a bot commit that dates each backend’s pending changelog entry under the
2.3.0tag by registry push_time; this entry corresponds to the ascend-cann9.2.1 layer, +305/-5 lines, 4 files, with no image content changes. Separately, #1613 lets the runtime’s FlagTree version request accept an explicit--index-url, leaving an escape hatch for the multi-build chain above. - Release-state check: an atomic check of Releases across 31 repos and Tags across 8 repos found no new Release objects in the window. On the community side,
release/2.3/release-2.3.yamlstill returns 404, while therelease/2.2manifest remains in place. Images now cover six layers, but manifest freeze and site launch have still not happened, consistent with last period’s assessment. - To watch: the base layer has expanded from four layers to six while the manifest is untouched, further reinforcing 2.3.0’s “images first” character. If the manifest is still not frozen this week, the actual released content will diverge from the 2.3.0 plan.
1.3 vLLM 0.28 line closes out across four backends on the same day: Tsingmicro, MetaX C550, Moore Threads MUSA, Ascend decode graphs (11-03)
Date: 2026-11-03 Source: vllm-plugin-FL PR #642 · vllm-plugin-FL PR #554 · vllm-plugin-FL PR #575 · vllm-plugin-FL PR #646 · vllm-plugin-FL PR #676
- Tsingmicro TXDA: #642 adapts the TXDA backend to vLLM 0.28.0, explicitly “eager only.” Graph mode isn’t broken — it was deliberately abandoned: piecewise native graphs had already passed full gating on two models at TP8 (snapshots R10 / R6d), but Dense TP1 correctness was never resolved, so the PR removes TXDA’s graph capture and splitting implementation and rejects graph and compile configs outright at configuration time with a
--enforce-eagerhint. MLA, sparse attention, speculative decoding, and context parallelism are likewise rejected item by item along specific unsupported paths rather than wholesale. +3067/-146 lines, 29 files. - MetaX C550: #554 does a “0.28-empty” adaptation in the absence of a vendor-side 0.28 path — all changes stay within
vllm_fl/and the MetaX CI scripts, with backend behavior gated onvendor_name == "metax"or the MetaX runtime. Per the established lifecycle convention, early import fixes are installed from the plugin entry point, kernel and backend replacements go in the vendor patch package, no site-packages.pthis written, andsetup.shclears out 15 legacyzz_fl_*.pthhooks. +2838/-70 lines, 36 files. - Moore Threads MUSA: #575 upgrades MUSA to 0.28.0 with native MCCL, FX/eager compilation, and piecewise native graphs, +7804/-233 lines, 46 files. The runtime baseline is four S5000 cards, BF16, TP=4, TorchMUSA 2.9.0, and MUSA SDK 4.3.5; on the compile side, RMSNorm, SiLU, and rotary go through explicit MUSA operator boundaries, with the reference RMSNorm preserving the target-side FP32 accumulation contract; graph handling is centralized in
dispatch/backends/vendor/musa/graph.py, and the MUSA compile subpackage and executable cache are removed. - Ascend decode graphs: #646 enables native graph capture and replay for
FULL_DECODE_ONLYon 0.4.0-dev, covering Qwen3.6-27B and Qwen3.6-35B-A3B, with decode going throughtorch.npu.NPUGraphwhile prefill, vision encoding, and sampling stay outside the graph. +3342/-340 lines, 39 files; it is a forward port of #606 and #619. - Two lines in parallel: alongside the 0.28 close-out, 0.32 adaptation is moving through the review queue — vllm-plugin-FL has five under review: #675 (Enflame S60), #674 (Iluvatar), #659 (AMD ROCm gfx1100), #693 (MetaX C550), and #667 (unified FL execution plus Enflame adaptation). 0.28 is the maintenance line and 0.32 the target line; running both at once has become the norm.
- Sync mechanism: the 0.4.0-dev → 0.5.0-dev forward-sync merged four PRs this window — #676, #678, #688, #689 — shifting from “whole-branch merge” to “replay review increments while preserving source commits,” with conflicts published as draft PRs.
1.4 FlagGems benchmark references: 23 merges in two minutes, H800 reference reads unified into a single JSON (11-03)
Date: 2026-11-03 Source: FlagGems PR #8293 · FlagGems PR #8294 · FlagGems PR #8295 · FlagGems PR #8296 · FlagGems PR #8318
- Batch size: 23 PRs landed within the two merge minutes of 16:41 and 16:42 — 21 in FlagGems and 2 in vllm-plugin-FL, with 21 from lukatao. FlagGems merged 76 in this window, 33 of them from lukatao alone, close to half.
- Unified JSON: the core is #8293 through #8296, which migrate the H800 reference reads for four operator classes — attention and pooling, reduction and linear algebra, pointwise, and sparse and tensor layout — to a unified JSON. Previously each class had its own reader, with reference sources, units, and rounding conventions scattered across the code; after the migration all four share a single data entry point.
- Backend reference fixes: the remaining twenty-odd PRs fix reference implementations per backend — on Ascend, native H800 baselines for tensorinv, orgqr, weight norm backward, Cholesky solve, and fractional max pooling backward; on Enflame, fixes to baddbmm, nanquantile, masked scale, and FlashAttention references; on Kunlunxin, retention of the FloatPower in-place reference override; on MUSA, LDL and four linear algebra references; on PPU, partial LU reference fixes and reconstruction precision.
- Supporting docs: #8318 adds a skill doc on “fixing local backend operator tests,” writing the “align the reference first, then judge the candidate” workflow as reusable operating instructions; #8275–#8277 and #5858 separately fix the as_strided_scatter test case, the Ascend CTC output dtype, the binomial out overload, and dtype inference in the cumsum precision check.
- Assessment: the value of this batch isn’t coverage but comparability. Cross-backend scores are only comparable when reference values share a source, units match, and rounding rules are explicit. Collapsing the readers into a single JSON is the precondition for the evaluation system to move from “each writes their own” to “one shared ruler,” and it explains why this could merge in minute-scale batches — the changes are mechanical, the boundaries clear, and no operator implementations are touched.
1.5 FlagGems KernelGen: ten PRs in ten minutes for Iluvatar BI-V150, twelve for NVIDIA, one segment each for Kunlunxin and Enflame (11-03)
Date: 2026-11-03 Source: FlagGems PR #8093 · FlagGems PR #8085 · FlagGems PR #8124 · FlagGems PR #8255 · FlagGems PR #8265 · FlagGems PR #8110 · FlagGems PR #6501
- Iluvatar BI-V150: 10 PRs merged within six minutes, 16:04 to 16:10, all tagged KernelGen Iluvatar line — three special polynomials (shifted Chebyshev, Hermite, and the out variant of Chebyshev), two upsample and padding backward ops, quantized max pooling, matrix-multiply smm, not_equal, and pooling indices backward. This is Iluvatar’s single-day backend entry peak and a new pace record of “ten PRs in ten minutes for one backend.”
- NVIDIA long tail, twelve: four sparse and structured operators, two cudnn-family kernels, two view and shape operators, two quantization and type operators, one linear algebra operator, plus one fix for _foreach-family compatibility on non-NVIDIA backends. All are KernelGen-generated and closed out by hand.
- Kunlunxin, eleven: #8273 bundles three performance changes (int cumsum row scan, mean scaling fold, nanmedian vectorization); #8250 makes inner actually participate in compilation on XPU and retunes tiles; #8252 moves Hermite h to the backend stateful executor; #8253 lowers poisson_nll_loss register pressure and fixes a tail over-read; #8262 optimizes lcm with the extended Euclidean algorithm; #8263 optimizes special_chebyshev_polynomial_u; #8257 adds backend specialization for native_batch_norm_legit_functional. Separately, #8255 accelerates argmin using the vendor
min.oSIMD payload with segmented wide-row parallelism, #8281 routes the non-in-place bitwise_left_shift entry to the tuned variant, and #8290 and #8319 fix foreach-series failures on XPU. - Enflame GCU300, four: #8265 fixes the cat/concatenate copy kernel dropping row tails; #8259 replaces
div_rnwithtl.fdivin silu_backward to fix wrong values on GCU300; #8251 makes uniform_ sampling land strictly within[from, to); #8254 fixes keyword names in the clip/clip_ GCU300 overlay. - Ascend and SiliconFlow: on Ascend, #8110 adds channel-wise INT8 BMM (bmm_w8a8, +519/-3 lines), and #8286 adds SKU docs for 910C and 950DT; on SiliconFlow, #6501 adds three operators at once —
_embedding_bag,_embedding_bag_forward_only,_embedding_bag_backward— supporting SUM/MEAN/MAX, weighting, padding exclusion, empty bags, and terminal offsets, +7494/-222 lines, 24 files. - Assessment: the day’s backend entry distribution shifted — Iluvatar leads with 10, NVIDIA continues filling the long tail with 12, Kunlunxin’s 11 are mostly tuning, Enflame’s 4 are all correctness fixes, and XuanTie had zero merges in FlagGems (its activity landed on the PPU compile and plugin side, see 3.5). This shows the KernelGen line can now schedule production per vendor rather than running all backends through one queue.
1.6 FlagQuantum: boolean register selection enters the qfunc/Qmod frontend, Pauli SELECT lowered to gate level (11-03)
Date: 2026-11-03 Source: FlagQuantum PR #1027 · FlagQuantum PR #1028 · FlagQuantum PR #1038 · FlagQuantum PR #1047 · FlagQuantum PR #1048 · FlagQuantum PR #1049
- Boolean selection line: #1027 establishes construction of bounded boolean-value candidates, #1028 selects boolean register candidates by target cost, #1029 validates those candidates with a common workflow, and #1038 wires bounded boolean selection into the native qfunc and Qmod frontend. Together the four turn “boolean register allocation” from an internal search into a compilation capability user programs can directly benefit from.
- Algorithms and lowering: #1035 adds SelectedMajoranaFermion, #1037 adds SelectPauliLCU, #1036 defers Majorana lowering to compile time, and #1047 lowers Pauli SELECT to gate level. Alongside #1030 (quantum control on classically conditioned Pauli gates) and #1043 (append for bound operations), the bridge between algorithmic expressiveness and backend executability is being built in segments.
- Semantics and visualization: #1039 captures native single-qubit phase calls, #1041 exposes exact weighting and global program phase, #1042 captures bounded within/apply scopes, #1045 exposes checked cleanup scopes and adjoint calls, #1031 lets the drawer render mixed quantum control and classical feedback in TeX, and #1044 and #1032 add two runnable examples.
- CI reuse: #1048 pilots a read-only host-local dependency environment on the MetaX CPU Core channel — mounting read-only dependencies when the Python patch version and the pyproject SHA-256 match exactly, otherwise falling back to the original install path. Controlled results on the same runner account, Python 3.11.17, and the same checkout: environment and Torch preparation dropped from 23 seconds to under 1 second, the four segments combined from 122 seconds to 101 seconds, with identical results on all four smoke tests. #1049 extends the mechanism to 16 A800 runner registrations and requires explicit read-only bind mounts.
- Assessment: the 28 merges spread across five lines — semantics, algorithms, lowering, visualization, and CI — with no single large change. This “advance each line a little every day” cadence keeps the quantum stack’s acceptance units independently recomputable — for a technology still changing rapidly, clear accounting matters more than feature count.
1.7 Training and operator libraries: TransformerEngine adds a Biren SUPA backend, FlagTensor adds MUSA, Megatron picks up DSv4 (11-03)
Date: 2026-11-03 Source: TransformerEngine-FL PR #143 · FlagTensor PR #14 · Megatron-LM-FL PR #202 · FlagTrain PR #49 · FlagGems-vllm PR #1055
- Biren joins the stack: TransformerEngine-FL #143 adds a Biren SUPA vendor backend, +3608 lines, 7 files — the first time Biren appears as a standalone backend in a FlagOS training component. The PR body says only “Add BIREN SUPA vendor” with no hardware validation record attached, making it skeleton-first.
- FlagTensor adds MUSA: #14 registers a MThreads/MUSA backend for FlagTensor and provides a small set of validated elementwise operators, +300/-5 lines, 14 files. The key point is MThreads-specific rewrites for seven transcendental functions — ACOS, ACOSH, ASIN, ASINH, ATAN, ATANH, TAN — bypassing libdevice paths unsupported by the MUSA Triton JIT; the default rewrite selection for NVIDIA and Ascend is unchanged. The same repo also had three commits that day for a PPU direct-launch fast path, host-side loop timing, and Kunlunxin tile tuning, and merged Ascend PR #32.
- Megatron picks up DSv4: #202 is the first in the “DeepSeek-V4 sync upstream” series, +3356/-775 lines, 26 files. The core is preserving precision-sensitive parameters when Float16Module converts the model — adding an optional FP32 parameter flag applied to attention sink/APE, mHC mapping and gates, and the residual-stream output head; keeping the compressor and indexer’s partial projections outside the FP8 context and applying inverse RoPE to private storage; letting delayed weight gradients pass through the optional attention submodule; and raising the mHC Sinkhorn iteration default from 10 to 20.
- Training and inference operators: three FlagTrain PRs, covering consolidating runtime backend directories by backend, adding other backend images, and a Triton implementation of upper-triangular masked softmax forward (NVIDIA and Ascend). Eight FlagGems-vllm PRs, covering MiniMax M3 sparse attention shim reusing FlagAttention, INT8 W8A8 MoE for MiniMax TP8, W8A16 multi-stage pipelining for fused_marlin_moe, and C++ operator metadata registration for W8A8 INT8 and FP8.
- Assessment: new chips enter FlagOS by two paths — one starting from training components (TransformerEngine adding a backend, FlagTensor adding a backend), the other from the operator line (KernelGen filling in operator by operator). Biren takes the first and stops at the skeleton, while Moore Threads has landed on both paths; the gap is in validation depth, not integration speed.
1.8 Fused communication operators: RS+add+RMSNorm+AG ring kernel enters FlagGems and the SGLang plugin (11-03)
Date: 2026-11-03 Source: FlagGems PR #8317 · sglang-plugin-FL PR #166 · FlagGems-sglang PR #279 · FlagGems PR #8347
- Kernel design: FlagGems #8317 adds two Triton kernels fusing “communication + normalization” (under review, +1403 lines, 3 files).
fused_rs_add_rms_norm_agreplacesall_reduce(x)plusfused_add_rms_norm(x, residual)with a single ring kernel, doing reduce-scatter, residual add, RMSNorm, and all-gather in one pass; rank r owns only the rows in[r*chunk, min(T,(r+1)*chunk)), normalization runs only on those rows, and the residual stays in scattered form. Withgather=Falseit stops after the owner step, doing only RS plus add plus RMSNorm. The companionfused_qkv_norm_aghandles the other end: normalizing q and kv separately on scattered qkv outputs, passing rest (k_pe) through unchanged, and running only the AG half of the ring. - Ring implementation: data moves concurrently over C channels, where channel c is a ring over ranks; on PPU 810E it directly reuses the pccl 28-channel graph ring so every hop goes over the ICN link. After each send, a flag is incremented on the successor, and the receiver waits for
flag >= base + step; flags only increase and the buffer parity flips on each call, so a predecessor entering call n+1 won’t touch data still being read in call n. - Upper-layer integration: sglang-plugin-FL #166 makes this RS + norm + AG fused kernel an option for pure TP prefill on the XuanTie side (under review); FlagGems-sglang #279 merges six model-level operators (sglang fused in-place RoPE, topk_softmax, fused_moe, chunk_gated_delta_rule_fwd, fused recurrent gated delta rule and its packed decode version) along with per-platform vendor overrides, +13061/-79 lines, 85 files, where rms_norm matches the existing one_pass_rms_norm in math and ABI and is therefore merged as
_mthreads,_thead,_hygonoverrides rather than as new operators. - Supporting cleanup: XuanTie-side #8347 is under review, removing the K-alignment fallback for NT GEMM on PPU; FlagTree #1348 merged, preserving the explicit swizzled TLE layout and avoiding the copied chained dot warp layout.
- Assessment: folding communication into operators is a common way to cut TP inference latency, but it requires the operator library to master both communication primitives and numerical contracts. This FlagGems batch is piloted first on the PPU and SGLang lines, indicating the capability is still tied to specific hardware topologies and not yet abstracted into a cross-backend general component.
1.9 Supporting infrastructure: optest Feishu notifications carry test summaries, FlagTree CI moves to Feishu Bitable, FlagQAI tightens the macOS sandbox (11-03)
Date: 2026-11-03 Source: optest PR #28 · optest PR #34 · FlagTree PR #1513 · FlagTree PR #1516 · FlagCX PR #669 · FlagQAI PR #30
- optest, seven: Feishu notifications gain a test summary, with the Trigger field moved to the end and Commit placed right after Ref (#28); probing FlagTrain’s runtime metadata (#29); configurable operator command timeouts (#30) and per-repo timeout configuration (#32); narrowed op-monitor upload retries (#31); simplified backend GPU configuration (#33); a Chinese README (#34). All seven revolve around making multi-backend test results readable, traceable, and rerunnable.
- FlagTree, eight: on the feature side, fixing an Ascend XCS lightning-indexer UB overflow, swiglu precision, and
tl.whereaccepting pointer operands, and preserving the explicit swizzled TLE layout on PPU; on the CI side, letting FlagGems’ CI scripts be shared across branches viaGITHUB_ACTION_PATH, reporting results into Feishu Bitable, forwarding Feishu secrets and warning when credentials are missing, and removing theenflame3.5-guc400CI/CD workflow. - FlagCX, three: adding an Ascend 910C CI pipeline and unifying unit-test orchestration (+1559/-664 lines, 41 files), running Torch Python coverage on four platforms and clearing duplicate CUDA performance tests, and fixing Ascend device completion-state tracking and tensor retention.
- FlagQAI, six: on macOS, bringing local Python jobs, headless-session workspace reads, native shell reads, search targets, and search subprocesses one by one inside the sandbox boundary, and checking SDK readiness before the Agent submits. The six are consecutive slices of one security tightening round.
- FlagAttention and the rest: FlagAttention fixes TMA prefill on non-power-of-two head dimensions and switches to uv pip for installing vendor dependencies; FlagSparse merges q4-related cleanup; four FlagDNN PRs point the packaged image at the published FlagOS repo and change the packaging workflow to validation-only.
- Assessment: 26 PRs this window landed on CI, evaluation, and tooling, 14.7% of all merges. For a project maintaining nine-plus backends simultaneously, this work produces no new operators, yet it determines whether “which backend regressed on which version” can be seen in time. FlagTree removing the GCU400 workflow and adding CANN 9.2.1 and 910C pipelines also shows the CI roster itself is turning over with hardware generations.
II. News Coverage and Ecosystem
2.1 Channel Verification: 24 Query Sets Yield Zero Component-Level Hits; No New Articles on CSDN or HN Within the Window (11-04)
Date: 2026-11-04 Sources: Google News RSS (FlagOS query) · CSDN FlagOS Column · HN Algolia (FlagOS)
- Google News: Of the 24 Chinese and English query terms, FlagOS, FlagGems, FlagScale, FlagTree, FlagPerf, FlagCX, KernelGen, flagos-ai, and all BAAI-related English combinations returned zero hits; hits were concentrated in member-organization and industry terms (BAAI open source 4, BAAI chips 4, Enflame 7, domestic compute open-source software stack 7, Moore Threads 3, MetaX 1, Tsinghua Micro 1), totaling 28 items. After reviewing each headline, none involved component versions, chip adaptation, or the FlagOS technology stack. This is the second consecutive window in which component-level queries returned zero.
- CSDN Column: Reviewing all 52 links on the page one by one, the latest article is the MiniCPM-OCR and Jev Day0 adaptation piece from 10-29 11:19, followed by the sglang-plugin-FL livestream posted at 10-29 16:25. The three articles listed at the top of the page—GLM-5.3-Flash, Qwen3.8-Flash-Next, and LightX2V—are older pieces from 8-28, 8-27, and 8-27 respectively and are not counted within the window.
- HN and BAAI Community: Among the eight HN queries, FlagOS returned 7 hits and BAAI 30, but direct title-and-body matching yielded 0. The BAAI Community homepage has no FlagOS entries, and its search page is client-rendered, so no timestamp-verifiable list could be captured.
- Assessment: The news-side blank in this second consecutive window stands in sharp contrast to the GitHub side’s 24-repo pushes and 177 merges. FlagOS’s external narrative still relies heavily on official channels (the CSDN column, BAAI Community, and conferences), and third-party media coverage of component-level progress has yet to take shape.
2.2 Industry Side: Member Organizations Win Outstanding Contribution Awards at the Wuzhen Summit; Enflame Debuts on the A-Share Market (11-03)
Date: 2026-11-03 Sources: World Zhejiang Entrepreneurs (MetaX award) · EEWorld (Moore Threads award) · Cailian Press (Enflame listing)
- Awards: MetaX and Moore Threads both received “Outstanding Contribution Awards” at the 2026 World Internet Conference Wuzhen Summit. Coverage on the MetaX side emphasized full-stack innovation and the growth potential of domestic GPUs; coverage on the Moore Threads side was published by EEWorld. Both are FlagOS member organizations.
- Listing: Enflame debuted on the A-share STAR Market, with coverage framing it as filling in the DSA-architecture compute piece for the STAR Market. Enflame’s S60 backend was merged into the vLLM 0.28 adaptation on 10-28, and the 0.32 adaptation (#675) is under review.
- Comparison: The three companies’ FlagOS-side actions within the window differed—MetaX’s C550 0.28 adaptation was merged the same day (see 1.3), Moore Threads’ MUSA 0.28 was merged the same day (see 1.3), and Enflame had four correctness fixes in FlagGems GCU300 (see 1.5). Progress at the capital and recognition level did not alter the pace of their technical investment.
- Note: This item covers corporate-side developments and is not directly related to the FlagOS technology stack; it is recorded only as ecosystem background. The sources are Google News aggregation links; the publishers’ original site addresses were not obtained.
III. Deep Dive into Member Units and Backend Vendors
3.1 Tsingmicro: TXDA on 0.28 Does Eager Only, Explicitly Rejects Graph Mode (11-03)
Date: 2026-11-03 Source: vllm-plugin-FL PR #642 · vllm-plugin-FL PR #641 · FlagGems PR #8279
- Trade-off: The body of #642 is worth reading word for word. Segmented native graphs were already implemented and passed the full gate for two models under TP8 (snapshots R10 and R6d), but Dense TP1 correctness was never resolved. Rather than shipping “a graph mode that only works at some parallelism levels,” the author deleted the graph capture and partitioning implementation, rejected graph and compile configs at the configuration stage, and pointed users directly to
--enforce-eager. - Rejection surface: MLA, sparse attention, speculative decoding, and context parallelism are each rejected item by item along their specific unsupported paths, rather than being disabled wholesale. This approach lets error messages point to the specific capability instead of letting users fail halfway through a run.
- Validation environment: 8× TX8110 64G, with vLLM in the image at
0.28.0+empty—built from upstream tag commit2cf0a69withVLLM_TARGET_DEVICE=empty, without thevllm._Cextension, with all kernels coming from the plugin or FlagGems. This effectively turns “is the plugin truly self-sufficient” into a hard constraint. - Scale: +3067 / −146 lines, 29 files, plus a
docs/usage/tsingmicro.mddeployment guide. - Assessment: This is the engineering trade-off most worth recording today. The most common failure mode in multi-backend adaptation is to ship a mode that only holds at a specific parallelism level and then expose it as numerical errors at the user site. #642 trades “one fewer mode” for “no mode that is wrong only under certain configurations”—the cost is explicit and the boundary is clear.
3.2 MetaX: C550’s 0.28 Is an “Empty Adaptation,” All Changes Kept Inside the Plugin (11-03)
Date: 2026-11-03 Source: vllm-plugin-FL PR #554 · vllm-plugin-FL PR #693 · FlagGems-vllm PR #1050 · FlagGems-vllm PR #1054
- What “empty adaptation” means: The vendor-side
MetaX-MACA/vLLM-metaxhas no 0.28 path yet, so #554 was done on the premise that “upstream has no corresponding branch”—all changes stay withinvllm_fl/and the MetaX CI scripts, with backend behavior gated by vendor name or runtime detection so other vendors are unaffected. +2838 / −70 lines, 36 files. - Installation form: Early import fixes are installed from the plugin entry point, while kernel and backend replacements go into the vendor patch package; the standalone site-packages bootstrap installer and
vllm_fl/_fl_boot_shims/were removed, andsetup.shclears out 15 legacyzz_fl_*.pthhooks. Review explicitly rejected the “write startup hooks into site-packages” approach, and that rejection itself applies to all vendors going forward. - Dual-track status: On the same day 0.28 was merged, the 0.32 C550 adaptation (#693) was opened at 02:23; on the FlagGems-vllm side, #1050 raises the sparse QSA dot tile lower bound to 16, and #1054 makes GLM5.3’s causal convolution and sparse MLA kernels runnable on C550 (under review), along with three operator optimizations under review: gdn_w8a16, fused_indexer_weight_scale, and layernorm.
- Assessment: MetaX’s shape in this window is “close out 0.28, pre-run 0.32, fill in long-tail operators”—three tracks moving simultaneously without blocking each other. Noteworthy is how 0.28 landed: relying on plugin self-sufficiency when upstream has no branch, which means its migration cost will be lower at the next upstream upgrade.
3.3 Moore Threads: MUSA 0.28 Brings in Native MCCL and Segmented Graphs in One Go (11-03)
Date: 2026-11-03 Source: vllm-plugin-FL PR #575 · FlagTensor PR #14 · FlagGems PR #8097
- Adaptation content: #575 upgrades MUSA to vLLM 0.28.0 while bringing in regular wheel installation, native MCCL, FX/eager compilation, and segmented native graphs—+7804 / −233 lines, 46 files. The runtime baseline is 4× S5000, BF16, TP=4, Python 3.10, TorchMUSA 2.9.0, MUSA SDK 4.3.5.
- Numerical contract: On the compile side, RMSNorm, SiLU, and rotary go through explicit MUSA operator boundaries; the reference RMSNorm retains the target-side FP32 accumulation contract. This point is critical—spelling out “whose accumulation precision the reference implementation follows” is what makes cross-backend comparison meaningful.
- Graphs and caching: Graph handling is concentrated in
graph.pyunder the MUSA vendor patch directory, while the MUSA compile subpackage, executable cache, and loader are removed. Opposite to Tsingmicro’s “pull the graph,” Moore Threads “folds the graph into a single file.” - Second track: FlagTensor #14 registers a MUSA backend for the tensor library and adds dedicated rewrites for seven transcendental functions; the same repo also had a PPU direct-launch fast path and Kunlunxin tile tuning commits that day. On the FlagGems side, #8097 (under review) optimizes tall-skinny FP8 matmul with transposed dot and GEMV tile.
- Assessment: Moore Threads is the only vendor today with landings on both the “inference plugin” and “tensor library” tracks. The division of labor is also clear: the plugin handles backend availability, the tensor library handles low-level operator forms.
3.4 Ascend: 0.28 Decode Graphs, CANN 9.2.1 base, INT8 BMM, and 910C CI Advance on Four Fronts (11-03)
Date: 2026-11-03 Source: vllm-plugin-FL PR #646 · build-infra PR #1614 · FlagGems PR #8110 · FlagCX PR #669 · FlagTree PR #1413
- Execution mode: #646 enables native graph capture and replay for
FULL_DECODE_ONLYon 0.4.0-dev, covering Qwen3.6-27B and Qwen3.6-35B-A3B, with decoding going throughtorch.npu.NPUGraphwhile prefill, vision encoding, and sampling stay outside the graph. +3342 / −340 lines, 39 files; it is a forward port of main-branch #606 and #619. - Runtime versions: #1614 adds a CANN 9.2.1 base layer, limited to 910B, python 3.12, torch 2.13, and triton_ascend 3.6.0, and deliberately leaves FlagTree and FlagCX empty (see 1.2). #1615 backfills the changelog date for that layer under 2.3.0.
- Operators: #8110 adds channel-wise INT8 BMM (bmm_w8a8), +519 / −3 lines; #8286 adds SKU docs for 910C and 950DT. On the FlagTree side, fixes cover lightning-indexer UB overflow, swiglu precision, and
tl.whereaccepting pointer operands, with flir #84 being the same-origin fix. - CI: FlagCX #669 adds an Ascend 910C pipeline and unifies unit test orchestration—+1559 / −664 lines, 41 files; Torch-FL #690 adds native Ascend quantum numerics and lossless FP64 collective communication.
- Assessment: Ascend advances on four layers—runtime version, execution mode, operators, and CI—on the same day, making it the most complete vendor track today. The choice to leave FlagTree empty in the CANN 9.2.1 base also shows that version advancement has clear sequential dependencies rather than being a one-shot wholesale upgrade.
3.5 Iluvatar, Kunlunxin, Enflame, XuanTie, Hygon, and Horizon: Batch Operator Additions on One Side, Continued Tuning on the Other (11-03)
Date: 2026-11-03 Source: FlagGems PR #8093 · FlagGems PR #8357 · FlagGems PR #8374 · FlagGems-vllm PR #1049 · sglang-plugin-FL PR #166 · FlagAttention PR #123
- Iluvatar: BI-V150 merged 10 dedicated operators within six minutes, from 16:04 to 16:10, covering padding backward, upsampling backward, three classes of special polynomials, quantized pooling, matmul smm, not_equal, and pooling index backward (list in 1.5). This is Iluvatar’s single-day peak in FlagGems, and all are new implementations.
- Kunlunxin: The 11 merged items are mostly tuning—argmin uses the vendor
min.oSIMD payload with segmented wide-row parallelism, lcm uses unrolled Euclid, poisson_nll_loss reduces register pressure, and inner actually participates in compilation on XPU with retuned tiles. The newly opened side has a batch of fixes concentrated in the early morning: sum_dim fallback, the fake_quantize series, lstm/gru pipeline event overflow,tt.gatherdowngrade for linalg_matmul and linalg_lu_solve, avg_pool1d aborting the process, and more. In this window he alone opened 59 items (31 Enflame, 25 Kunlunxin, 3 NVIDIA), 33 of which landed between 00:07 and 05:43. - Enflame: Four GCU300 correctness fixes (cat row tail, silu_backward division semantics, uniform_ interval, clip keyword), plus newly opened #8374 making generic kernels run on non-CUDA backends and #8375 making the modified Bessel kernel run on non-CUDA backends. FlagTree concurrently removed the
enflame3.5-guc400CI/CD workflow, which is a CI list rotating with hardware generations and should not be read as a product line termination. - XuanTie: Zero merges on the FlagGems side; activity is on the compile and plugin sides—FlagTree #1348 merges the TLE layout preserving explicit swizzled; #8347 (under review) removes the K-alignment fallback for NT GEMM on PPU; sglang-plugin-FL #166 (under review) makes the RS+norm+AG fused kernel a pure TP prefill option; FlagGems-vllm #1049 (under review) adds flash_mla_sparse_fwd for thead. After the previous window’s batch of 13 dedicated operators, this window shifts to the compile and communication layers.
- Hygon: Newly opened #8357 optimizes FP32 matmul for scientific model workloads; FlagGems-sglang #279 takes over BW1000 with
_hygonoverrides; FlagAttention #123 and #117 (both under review) add the AttnRes backend and optimize GLA respectively; FlagTrain #10 (under review) covers Hygon in mixed_gemm. - Horizon and Cambricon: Neither had commits in any FlagOS repo this window. Cambricon’s neuware 4.4.3 layer has completed changelog date backfill under 2.3.0 (see 1.2), which is existing image-side work.
- Assessment: Backend items are shifting from “make it run” to “tune per chip”—Kunlunxin’s SIMD-ized argmin, Hygon’s FP32 matmul optimization, and Enflame’s non-CUDA generic kernel fallback are none of them new coverage, but rather making existing implementations faster or more stable on specific workloads. This kind of work does not show up in coverage numbers, yet it determines actual usability.
IV. Summary and Trend Observations
Date: 2026-11-03 ~ 2026-11-04 Sources: flagos-ai organization repositories · Merged PR search
- Faster merges, concentrated production: 177 merges, up 9.3% from the previous window; 117 newly opened PRs, down 39.1%; 271 in-review PRs updated during the window, down 12.9%. But the drop in newly opened PRs comes almost entirely from a shift in pace at a single repo, FlagGems, where 59 of them came from the same author and clustered on the Kunlunxin and Enflame product lines. Organization-wide, 1,602 PRs remain in review, a merge-to-review ratio of about 1 to 9, so review pressure has not materially eased.
- 0.28 closes out as 0.32 opens up: Four backends — Tsingmicro, MetaX, Moore Threads, and Ascend — closed out vLLM 0.28.0 on the same day, totaling 150 files and 17,051 added lines; meanwhile, five 0.32 adaptations are moving through the review queue. Running the maintenance line and the target line in parallel has become the norm, and vendors must maintain two validation environments at once — a hidden cost of multi-chip adaptation.
- Benchmark comparability is becoming new infrastructure: FlagGems’ 23 benchmark migrations in two minutes consolidated the H800 reference readings for four operator categories into a unified JSON; together with optest’s Feishu test summaries, FlagTree’s Feishu multi-dimensional tables, and FlagCX’s four-platform coverage, the benchmarking pipeline is shifting from “each writing its own” to “one shared ruler.” This window, 26 PRs landed on CI and benchmarking, 14.7% of merges.
- Both paths for onboarding new chips are now proven: Biren entered TransformerEngine-FL via the SUPA backend (skeleton first, with no hardware validation record), Moore Threads landed on both the inference plugin and tensor library lines simultaneously, and Iluvatar walked the operator line with ten dedicated operators in a single day. Onboarding speed is no longer the bottleneck — validation depth is: Biren’s backend is currently only a skeleton, with no hardware gating record on par with Tsingmicro or MetaX.
- 2.3.0 is still image-first: The base layer has expanded to six layers (including CANN 9.2.1), runtime images are pushed per backend, and changelog dates are backfilled layer by layer, but the community’s
release/2.3manifest still returns 404. Three consecutive windows have passed with no manifest freeze, and a gap is accumulating between what is actually released and what was planned. - Three things to watch: First, when the
release/2.3manifest appears, which determines whether 2.3.0 can ship this month; second, when the five 0.32 adaptations merge, which determines whether the target line slips again; third, whether the fused communication operator (RS+add+RMSNorm+AG) can be abstracted from the PPU and SGLang pilots into a cross-backend general component.
Appendix
Source Verification Table
| Source | Verification Result |
|---|---|
| GitHub organization repositories (61 repos) | 24 repos pushed within the window, 228 commits, 177 merged PRs, 19 repos with merges |
| GitHub open PRs | 271 updated within the window, 117 newly opened, 1602 open across the organization |
| GitHub Release / Tag (31 repos / 8 repos) | Zero new within the window; FlagCX v0.14.1 (11-01 00:10) falls outside the window |
| community release manifest | release/2.3/release-2.3.yaml returns 404; release/2.2 is live |
| Google News RSS (24 Chinese/English queries) | All component-level queries returned zero hits; 28 items for member companies and industry terms, all corporate-side or financial coverage |
| HN Algolia (8 queries) | 7 items for FlagOS, 30 for BAAI; 0 items directly matching title and body |
| CSDN FlagOS column | All 52 links checked individually; latest article dated 10-29 11:19, no new articles within the window |
| BAAI Hub | No FlagOS entries on the homepage; search page is client-rendered, no timestamped list available for verification |
| Member company GitHub-side verification | MetaX, Moore Threads, Tsingmicro, Iluvatar, Enflame, and Hygon show FlagOS-side activity; Cambricon and Horizon have zero commits in this window |
Full Source List
- [1] flagos-ai organization repository list — https://github.com/orgs/flagos-ai/repositories
- [2] Commit search (window start 2026-11-02T22:00:00Z) — https://github.com/search?q=org%3Aflagos-ai+committer-date%3A%3E2026-11-02T22%3A00%3A00Z&type=commits
- [3] Merged PR search — https://github.com/search?q=org%3Aflagos-ai+is%3Apr+is%3Amerged+merged%3A%3E%3D2026-11-02T22%3A00%3A00Z&type=pullrequests
- [4] Open PR search — https://github.com/search?q=org%3Aflagos-ai+is%3Apr+is%3Aopen+updated%3A%3E%3D2026-11-02T22%3A00%3A00Z&type=pullrequests
- [5] Organization-wide open PR count search — https://github.com/search?q=org%3Aflagos-ai+is%3Apr+is%3Aopen&type=pullrequests
- [6] build-infra PR #1614 (CANN 9.2.1 base image) — https://github.com/flagos-ai/build-infra/pull/1614
- [7] build-infra PR #1615 (2.3.0 changelog date) — https://github.com/flagos-ai/build-infra/pull/1615
- [8] build-infra PR #1613 (–index-url for FlagTree version requests) — https://github.com/flagos-ai/build-infra/pull/1613
- [9] community 2.2 release manifest — https://github.com/flagos-ai/community/blob/main/release/2.2/release-2.2.yaml
- [10] vllm-plugin-FL PR #642 (Tsingmicro TXDA adaptation for vLLM 0.28.0) — https://github.com/flagos-ai/vllm-plugin-FL/pull/642
- [11] vllm-plugin-FL PR #554 (MetaX C550 adaptation for vLLM 0.28.0) — https://github.com/flagos-ai/vllm-plugin-FL/pull/554
- [12] vllm-plugin-FL PR #575 (MUSA adaptation for vLLM 0.28.0) — https://github.com/flagos-ai/vllm-plugin-FL/pull/575
- [13] vllm-plugin-FL PR #646 (Ascend native decode graph) — https://github.com/flagos-ai/vllm-plugin-FL/pull/646
- [14] vllm-plugin-FL PR #676 (0.4.0-dev to 0.5.0-dev sync) — https://github.com/flagos-ai/vllm-plugin-FL/pull/676
- [15] vllm-plugin-FL PR #693 (MetaX C550 adaptation for vLLM 0.32, open) — https://github.com/flagos-ai/vllm-plugin-FL/pull/693
- [16] vllm-plugin-FL PR #675 (Enflame S60 adaptation for vLLM 0.32, open) — https://github.com/flagos-ai/vllm-plugin-FL/pull/675
- [17] vllm-plugin-FL PR #674 (Iluvatar adaptation for vLLM 0.32, open) — https://github.com/flagos-ai/vllm-plugin-FL/pull/674
- [18] vllm-plugin-FL PR #659 (AMD ROCm adaptation for vLLM 0.32, open) — https://github.com/flagos-ai/vllm-plugin-FL/pull/659
- [19] vllm-plugin-FL PR #667 (unified FL execution and Enflame 0.32 adaptation, open) — https://github.com/flagos-ai/vllm-plugin-FL/pull/667
- [20] FlagGems PR #8293 (attention and pooling H800 references migrated to unified JSON) — https://github.com/flagos-ai/FlagGems/pull/8293
- [21] FlagGems PR #8294 (reduction and linear algebra H800 references migrated to unified JSON) — https://github.com/flagos-ai/FlagGems/pull/8294
- [22] FlagGems PR #8295 (pointwise H800 references migrated to unified JSON) — https://github.com/flagos-ai/FlagGems/pull/8295
- [23] FlagGems PR #8296 (sparse and tensor layout H800 references migrated to unified JSON) — https://github.com/flagos-ai/FlagGems/pull/8296
- [24] FlagGems PR #8318 (skill documentation for local backend operator test fixes) — https://github.com/flagos-ai/FlagGems/pull/8318
- [25] FlagGems PR #8093 (Iluvatar BI-V150 replication_pad1d_backward) — https://github.com/flagos-ai/FlagGems/pull/8093
- [26] FlagGems PR #8085 (Iluvatar BI-V150 smm) — https://github.com/flagos-ai/FlagGems/pull/8085
- [27] FlagGems PR #8124 (NVIDIA flatten_dense_tensors) — https://github.com/flagos-ai/FlagGems/pull/8124
- [28] FlagGems PR #8255 (Kunlunxin argmin SIMD acceleration) — https://github.com/flagos-ai/FlagGems/pull/8255
- [29] FlagGems PR #8265 (Enflame GCU300 cat row-end fix) — https://github.com/flagos-ai/FlagGems/pull/8265
- [30] FlagGems PR #8110 (Ascend bmm_w8a8 INT8 BMM) — https://github.com/flagos-ai/FlagGems/pull/8110
- [31] FlagGems PR #6501 (SiliconFlow cross-backend embedding bag) — https://github.com/flagos-ai/FlagGems/pull/6501
- [32] FlagGems PR #8317 (RS+add+RMSNorm+AG fused ring kernel, open) — https://github.com/flagos-ai/FlagGems/pull/8317
- [33] FlagGems PR #8357 (Hygon FP32 matrix multiplication optimization, open) — https://github.com/flagos-ai/FlagGems/pull/8357
- [34] FlagGems PR #8374 (Enflame generic kernels running on non-CUDA backends, open) — https://github.com/flagos-ai/FlagGems/pull/8374
- [35] FlagGems PR #8347 (DAMO XuanTie PPU removal of NT GEMM K-alignment fallback, open) — https://github.com/flagos-ai/FlagGems/pull/8347
- [36] FlagGems-sglang PR #279 (model-level operator integration and vendor coverage) — https://github.com/flagos-ai/FlagGems-sglang/pull/279
- [37] FlagGems-sglang PR #287 (one_pass_rms_norm parameter name alignment) — https://github.com/flagos-ai/FlagGems-sglang/pull/287
- [38] FlagGems-vllm PR #1055 (MiniMax M3 sparse attention shim) — https://github.com/flagos-ai/FlagGems-vllm/pull/1055
- [39] FlagGems-vllm PR #1050 (MetaX sparse QSA dot tile lower bound) — https://github.com/flagos-ai/FlagGems-vllm/pull/1050
- [40] FlagGems-vllm PR #1054 (GLM5.3 runnable on C550, open) — https://github.com/flagos-ai/FlagGems-vllm/pull/1054
- [41] FlagGems-vllm PR #1049 (DAMO XuanTie PPU flash_mla_sparse_fwd, open) — https://github.com/flagos-ai/FlagGems-vllm/pull/1049
- [42] FlagQuantum PR #1027 (bounded boolean candidates) — https://github.com/flagos-ai/FlagQuantum/pull/1027
- [43] FlagQuantum PR #1028 (boolean register candidate selection by target cost) — https://github.com/flagos-ai/FlagQuantum/pull/1028
- [44] FlagQuantum PR #1038 (boolean selection wired into qfunc and Qmod) — https://github.com/flagos-ai/FlagQuantum/pull/1038
- [45] FlagQuantum PR #1047 (Pauli SELECT lowered to gate level) — https://github.com/flagos-ai/FlagQuantum/pull/1047
- [46] FlagQuantum PR #1048 (MetaX CPU Core read-only dependency pilot) — https://github.com/flagos-ai/FlagQuantum/pull/1048
- [47] FlagQuantum PR #1049 (A800 reuse of host-local dependencies) — https://github.com/flagos-ai/FlagQuantum/pull/1049
- [48] TransformerEngine-FL PR #143 (Biren SUPA backend) — https://github.com/flagos-ai/TransformerEngine-FL/pull/143
- [49] FlagTensor PR #14 (MThreads/MUSA backend) — https://github.com/flagos-ai/FlagTensor/pull/14
- [50] Megatron-LM-FL PR #202 (DeepSeek-V4 upstream sync 1/N) — https://github.com/flagos-ai/Megatron-LM-FL/pull/202
- [51] FlagTrain PR #49 (add other backend images) — https://github.com/flagos-ai/FlagTrain/pull/49
- [52] FlagTrain PR #44 (upper-triangular mask softmax forward) — https://github.com/flagos-ai/FlagTrain/pull/44
- [53] FlagTree PR #1413 (Ascend XCS lightning-indexer UB overflow) — https://github.com/flagos-ai/FlagTree/pull/1413
- [54] FlagTree PR #1513 (CI results reported to Feishu Bitable) — https://github.com/flagos-ai/FlagTree/pull/1513
- [55] FlagTree PR #1516 (remove enflame3.5-guc400 workflow) — https://github.com/flagos-ai/FlagTree/pull/1516
- [56] FlagTree PR #1348 (PPU swizzled TLE layout) — https://github.com/flagos-ai/FlagTree/pull/1348
- [57] FlagCX PR #669 (Ascend 910C CI pipeline) — https://github.com/flagos-ai/FlagCX/pull/669
- [58] FlagCX PR #686 (Ascend device completion status tracking) — https://github.com/flagos-ai/FlagCX/pull/686
- [59] Torch-FL PR #690 (Ascend quantum numerics and FP64 collective communication) — https://github.com/flagos-ai/Torch-FL/pull/690
- [60] FlagAttention PR #125 (TMA prefill with non-power-of-2 head dimensions) — https://github.com/flagos-ai/FlagAttention/pull/125
- [61] FlagAttention PR #123 (Hygon AttnRes backend, open) — https://github.com/flagos-ai/FlagAttention/pull/123
- [62] optest PR #28 (Feishu notifications with test summary) — https://github.com/flagos-ai/optest/pull/28
- [63] optest PR #34 (Chinese README) — https://github.com/flagos-ai/optest/pull/34
- [64] FlagQAI PR #30 (macOS search subprocess sandbox) — https://github.com/flagos-ai/FlagQAI/pull/30
- [65] sglang-plugin-FL PR #166 (DAMO XuanTie RS+norm+AG fused kernel, open) — https://github.com/flagos-ai/sglang-plugin-FL/pull/166
- [66] flir PR #84 (tl.where accepts pointer operands) — https://github.com/flagos-ai/flir/pull/84
- [67] Google News RSS (FlagOS query) — https://news.google.com/rss/search?q=FlagOS&hl=zh-CN&gl=CN&ceid=CN:zh-Hans
- [68] CSDN FlagOS column — https://flagos.csdn.net/
- [69] HN Algolia (FlagOS query) — https://hn.algolia.com/api/v1/search_by_date?query=FlagOS&tags=story
- [70] BAAI Hub — https://hub.baai.ac.cn/
- [71] World Zhejiang Entrepreneurs (MetaX receives World Internet Conference Outstanding Contribution Award, Google News aggregation) — https://news.google.com/rss/articles/CBMiUkFVX3lxTE04ekhVR3JGMENjQ19OcXpEVjNIWjdYdnBPdjVTT1hKRTRQcFdFNzJBZE9jOExQczdmZDVOUTY2TWhETVV5S3h3UG1GTFo4eVhxa0E?oc=5
- [72] EEWorld (Moore Threads receives Outstanding Contribution Award, Google News aggregation) — https://news.google.com/rss/articles/CBMiWEFVX3lxTE1UZWpzOHJCbkNaZkdjVWZleHJPdGRlODhzMkNLREZmZjY3N2psRm9ETUl1NndQLXJtaUFuNFZUME5sMk5odEJISC1tZVF2NFVVREV1ZzRqRmM?oc=5
- [73] Cailian Press (Enflame Technology lists on A-shares, Google News aggregation) — https://news.google.com/rss/articles/CBMiSEFVX3lxTE9LejlGV1BnSG8yekRnNXZvWUNGZ3otblROQjNUcHdPZVNNYllkbWIyRnZJRkxGMUxRbjlETEhRZk5fZnBPWVJnTQ?oc=5