Research window: Past 24 hours (2026-09-20 07:00 ~ 2026-09-21 07:00, Beijing time). This is a regular daily window with no overlap with the previous issue. Sources: GitHub (push verification across 28 repositories in the tile-ai organization, 8 repositories had pushes within the window; file-by-file review of merges in the main repo’s k-pool chain, SM120 requirement ticket and patch, review queue activity; TileOPs migration merge, roofline self-check PR and two newly opened PRs, full parsing of two nightly snapshot XMLs; Ascend repo’s 11 merges and scheduled task failure event, two follow-up PRs; Hygon example support PR; two MLIR Ascend landings; documentation site deployment; adopter and silent backend verification), Google News RSS multi-language multi-query searches (via proxy), Hacker News, arXiv

Issue Index

  • Today’s Highlights: First merge in the GLM-5.3 k-pool chain — full example set and 4 AMD tests enter mainline, four stack entries still open (09-20)
  • I. Core Project Progress
    • 1.1 Main repo: SM120 block-scaled GEMM adds register residency and odd warp grid, requirement ticket to patch in just 21 minutes (09-21)
    • 1.2 Main repo review queue: frontend Python iterable and CPU OpenMP two cross-week entries advance (09-20)
    • 1.3 TileOPs: dense Gated DeltaNet prefill migration merged, net deletion of ~900 lines (09-20)
    • 1.4 TileOPs: roofline checklist self-check — 88 of 175 operators have declared formulas never executed (09-20/09-21)
    • 1.5 TileOPs: variable-length GQA merge and W4A16 GEMV speedup two new opens (09-20)
    • 1.6 Nightly snapshots: two consecutive zero-failure runs, 6 more benchmark cases after #2144 merge (09-20/09-21)
  • II. Multi-Backend Adaptation (Ascend / Hygon / MetaX / Moore Threads)
    • 2.1 Ascend: 11 merges in a single day, FP32 row reduction and sync fix largest at 72 files (09-20)
    • 2.2 Ascend: verification tail of batch merges — scheduled task failure, two follow-up PRs opened (09-20/09-21)
    • 2.3 Hygon: HCU example support PR opened, example branch synchronized (09-20)
    • 2.4 MLIR Ascend: Mamba operator and agent pipeline model selection (09-20)
    • 2.5 MetaX, Moore Threads, Sunrise: no new commits in window (09-17/09-18)
  • III. Ecosystem and Adopters
    • 3.1 Adopters: TileKernels and FlashQLA no pushes in window (04-23 / 09-18)
    • 3.2 Community projects: TileLang-TPU advances ChunkScan landing on Sophgo TPU side (09-20)
  • IV. Community, Tutorials and Events
    • 4.1 Documentation site: one automated deployment each for main repo and TileOPs docs sites (09-20)
    • 4.2 Media and academia: zero additions in window (09-21)
    • 4.3 Release cadence: main repo v0.1.14 released 19 days ago, adaptation repo tags unchanged (09-02)
  • V. Trend Observations
    • 5.1 ROCm line: stacked delivery begins to converge — one compressed merge brings the full example set into mainline
    • 5.2 NVIDIA line: SM120 enters hour-level response cadence
    • 5.3 TileOPs trust engineering: from readings and criteria to the formulas themselves
    • 5.4 Ascend’s batch merge day: beyond the gains, there’s a verification tail
    • 5.5 Gaps and risk points
  • Appendix: Materials and verification notes

Today’s Highlight: First Merge of the GLM-5.3 k-pool Chain — Full Example Suite and 4 AMD Tests Land in Mainline

Date: 2026-09-20　Source: tilelang #3254 GLM-5.3 k-pool Top-K transform / merge commit eab74a4a / kpool example README

Merged at 17:06 (Beijing time) on 09-20 as a squashed commit (single parent), bringing the GLM-5.3 k-pool series that formed a chain in the previous window into mainline: 11 files, +2520/-4. What landed is not a single operator patch but a complete, runnable asset set:

  • Example suite examples/kpool/: a README plus four examples covering the full pipeline of the GLM-5.3-Flash sparse attention indexer — in-pool softmax-weighted pooling, BF16 round-trip with normalized Hadamard-128, per-vector FP8 quantization with FP32 scaling, writing into a caller-owned paged cache, reading back and computing 32-head MQA weighted scores, selecting 512 pools and expanding at four tokens per pool (with additional support for token tables and irregular offset mapping); the published specialized configuration is pool_size=4, head_dim=128. The cache contract is spelled out: the production vLLM kernel packs FP8 values and FP32 scales into a single interleaved uint8 allocation, whereas the examples express k_cache and scale_cache as two caller tensors, with the FP8 format chosen per platform (e4m3fnuz for pre-gfx950, e4m3fn for gfx950/CUDA).
  • AMD-side tests testing/python/amd/: four ROCm tests (compression, decode tail, paged FP8 MQA logits, Top-K transform).
  • Minor language-layer change: determine_fp8_type() and determine_torch_fp8_type() in tilelang/language/fp8.py gain a device parameter — FP8 dtype selection moves from a fixed device 0 to a specifiable device.

Verification: exact-head CI (run 35428061006) passed Quick Lint, ROCm, CUDA, Metal, and CuTeDSL across the board; the ROCm 7.2 job reported 2433 passed and 1852 skipped on MI300X/gfx942.

Stack status: the PR describes itself as “stacked on #3253, including #3250, #3251, #3253 until each is merged” — it is the top of the entire stack, and the squash merge brings the stack’s contents into main as a whole; as of the end of this window, #3250, #3251, #3253, and #3255 remain unmerged with no updates since 09-19, requiring maintainers to close them out via rebase or closure.

Assessment: from #3250 being opened (early morning 09-19) to the entire chain’s contents entering main (afternoon 09-20), roughly 34 hours elapsed. AMD-side activity has moved from “the backend is usable” and “new model operators are needed” to “model-specific example suites and test assets are landing in the repo”; combined with the “examples as tests” principle established earlier in #3165, the delivery form for this path has stabilized — examples are not just documentation but correctness assets run directly by CI.

I. Core Project Progress

Window Overview: Main repo 1 merge (k-pool chain, see today’s highlight), 1 issue and 1 new PR (SM120 line), plus two queue items advanced; TileOPs 1 large merge (migration), 3 newly opened PRs, and 2 nightly snapshots.

1.1 Main Repo: SM120 Block-Scaled GEMM Fills In Register Residency and Odd Warp Grids, Issue to Patch in 21 Minutes (09-21)

Date: 2026-09-20 to 2026-09-21　Source: tilelang #3256 SM120 block-scaled GEMM issue／#3257 SM120 fragment and odd warp grids／#2253 SM120 block-scaled MMA and SageAttention3

In the latter part of the window (early morning 09-21), the main repo saw a straight “issue-to-patch” line: at 01:22 issue #3256 was created (SageAttention3’s replacement of low-frequency MMA macros with T.gemm_blockscaled was blocked by two limitations—no support for fragment A with shared B operand scopes; and the per-warp 1x8 MMA atomic grid with FullRow plus compact scaling under M=N=K=128, 256 threads was rejected); at 01:43 patch #3257 was opened, by the same author (sepcnt), 6 files +252/-42: supporting fragment A and row-major scaled fragments for SM120 block-scaled GEMM, fixing compact scaling for odd per-warp atomic grids (including 8x1 partitioning), and adding fallback and correctness tests; during the same period #2253 (the main SageAttention3 large PR) was updated. The issue carried its own validation conditions: measured on main eab74a4a after merging #3254, torch 2.11.0+cu130, sm_120a environment.

Assessment: The 21-minute gap shows the author of this line already had a complete grasp of the problem boundary; SM120 (the new generation of consumer and workstation GPUs) block-scaled GEMM is advancing from “usable” toward “meeting the shape requirements of specific attention kernels,” with the route driven by SageAttention3’s actual needs.

1.2 Main Repo Review Queue: Frontend Python Iterables and CPU OpenMP, Two Cross-Week Items Advance (09-20)

Date: 2026-09-20　Source: #3230 Frontend support for Python iterables and comprehensions／#3109 CPU grid loop OpenMP parallelization

Two queue items were updated within the window (neither merged): #3230 (created 09-15, updated 09-20 23:42) lets the frontend accept Python iterables and comprehensions as loop bounds; #3109 (created 08-28, updated 09-20 21:56) adds OpenMP parallelization for grid loops in the CPU backend. The two target frontend usability and the CPU path respectively, both being long-queue items advanced across weeks. Also: #3245 (GEMM dtype interception before CUDA code generation) and #3247 (Tile IR backend, draft) saw no updates within the window.

1.3 TileOPs: Dense Gated DeltaNet Prefill Migration Merged, Net Deletion of ~900 Lines (09-20)

Date: 2026-09-20　Source: TileOPs #2144 Migrate dense Gated DeltaNet prefill

Merged 09-20 21:29, 19 files, +2102/-3003 (net -901), author superAngGao, part of the linear attention unification work (#2143): wiring Hopper’s BTHD dense prefill pipeline into the unified operator GatedDeltaNetFwdOp, with the implementation split into gated_deltanet/prefill/ (entry, common lowering and caching, state correction, fused forward—four layers); the old GatedDeltaNetPrefillFwdKernel was removed directly from the kernel manifest with no compatibility alias left behind (pre-release cleanup), the new name being GatedDeltaNetDensePrefillFwdKernel.

Scope and validation: this stage supports only equal-length, zero initial state, H==HV, K==V==128 prefill (decode, first state, GVA, variable-length, etc. left for later); H200, SM locked at 1500 MHz: Gated DeltaNet 5 tests pass; 6 manifest benchmark cases pass item-by-item against FLA, BF16 output max absolute error 1.37e-4, FP32 final state 2.31e-3; end-to-end 0.3855 ms vs FLA 0.5435 (S=4096, 1.41x), 0.5224 vs 1.5384 (S=32768, 2.94x).

Assessment: This is a sample of treating “migration” as pre-release cleanup—deleting the old kernel, unifying the ABI, cleaning the manifest, at the cost of capabilities like decode needing to be filled in in later windows; the operator library’s interface convergence proceeds by “unify first, complete later.”

1.4 TileOPs: Roofline Manifest Self-Audit—88 of 175 Operators Had Declared Formulas Never Executed (09-20/09-21)

Date: 2026-09-20 to 2026-09-21　Source: TileOPs #2158 Unify manifest formulas with actually-run formulas and recount

Opened 09-20 07:29, still updating 09-21 06:55 (57 files, +2965/-980, 20 commits, not merged). This one advances “measurement credibility” governance to the formula layer: the roofline field should be the single source of truth for formulas, and eval_roofline() its only evaluation surface—neither held at the time. Audit results: of 175 implemented operators, 77 are served by code generation, the remaining 98 carry author-written methods, of which 88 manifest formulas were never executed; 16 inline entries could not be evaluated at all (referencing names never bound at the variable layer); the structural oracle checked only 14 operators, with the remaining 161 listed as “PENDING” without reason.

Errors in the formulas themselves were also listed in batches, a few excerpts: Conv3d forward priced by the current kernel’s scratch buffers (67,330,176 vs 25,276,416); 7 RoPE-family operators counted the operator’s own cos/sin tables (34,611,200 vs 33,562,624); Mamba2 forward omitted final_states; DeltaNetAutograd shared the forward formula, over-counting 5 tensors resident in the autograd context (21,135,360 vs 8,421,376); paged GQA forward priced the fp8 cache by query dtype (2,550,153,796 vs 1,442,857,548); batch normalization omitted mutated writes and parameter gradients; grouped matrix multiply over-counted per-group metadata, etc.

Assessment: The previous window was a trio of “formulas accountable to semantics (#2155), measurement accountable to physical principles (#1996), data accountable to provenance (#2154)”; this one turns the same ruler on the formula assets themselves—first prove that “the one that runs” is “the one that’s written,” then talk about speed. For an operator library meant to be depended on upstream, this is a key step in flipping the credit foundation from “looks right” to “computable and matching.”

1.5 TileOPs: Variable-Length GQA Consolidation and W4A16 GEMV Speedup, Two Newly Opened (09-20)

Date: 2026-09-20　Source: TileOPs #2160 Migrate variable-length GQA kernels to unified operator／#2159 W4A16 W4 GEMV speedup

#2160 (created 09-20 11:55, 17 files +638/-1232, not merged): migrates the 16-bit regular and sliding-window variable-length kernels into GroupedQueryAttentionVarlenFwdOp, and removes two superseded public operators; request lengths and tile ownership are now derived GPU-side from cu_seqlens (total_q/total_kv remain TileLang dynamic dimensions); the public result aligns with dense GQA (returns only o); fully masked rows deterministically output 0. Validation: on H200 the GQA suite passes 71 items (dense and backward 41, variable-length 30), smoke 19, compile boundary 6, CUPTI single item 0.0699 ms, plus 54 items for roofline, manifest, and kernel mapping. The author notes no performance claims are made—this is a migration consolidation.

#2159 (created 09-20 11:05, 2 files +87/-38, draft): W4A16’s W4 GEMV on H200 drops from 28.83 µs to 23.84 µs (1.21x); the approach assigns each output row to one warp, keeps FP32 accumulation along the K dimension, and finishes with warp shuffle; enabled on SM90 only for measured shapes. The author honestly states “still 9.4% slower than the fastest Marlin baseline; this one stays a draft.”

Assessment: The two continue TileOPs’ two main lines—interface convergence (unified operators, deleting old ones) and small-step performance catch-up (flagging gaps when not meeting targets, not entering the mainline).

1.6 Nightly Snapshots: Two Consecutive Zero-Failure Runs, 6 More Benchmark Cases After #2144 Merged (09-20/09-21)

Date: 2026-09-20 to 2026-09-21　Source: TileOPs-nightly snapshot branch／snapshot environment metadata

The nightly pipeline produced two snapshots within the window: 09-20 08:02 generated for 0bedc999 (#1996)—correctness 1118 items, 0 failures, 2 skipped; benchmarks 1040 items, 0 failures, 3 skipped. 09-21 02:38 generated for f8c4081c (#2144 merged)—correctness flat (1118, zero failures), benchmarks up to 1046 items, 0 failures, 3 skipped (the 6 new cases come from the manifest benchmarks merged in by the migration). Environment metadata matches the previous period: H200, CUDA 13.2, driver 595.71.05, power cap 700 W, SM 1500 MHz, memory clock 3201 MHz, TileLang 0.1.11 plus codename version, torch 2.13.0.

Assessment: Two zero-failure runs across two days show the newly merged content is properly covered; the benchmark case count grows monotonically with merges, and the nightly pipeline is steadily taking on the “post-merge validation” role.

II. Multi-Backend Adaptation (Ascend / Hygon / MetaX / Moore Threads)

2.1 Ascend: 11 Merges in a Single Day, FP32 Row Reduction and Sync Fix the Largest (09-20)

Date: 2026-09-20　Source: tilelang-ascend #1753 FP32 row reduction and sync fix／#1804 row slice copy stride fix／#1809 block_sparse_mqa_attn async read/write fix／#1621 mhc_pre operator example

The Ascend repo saw a batch merge day on 09-20: 11 PRs landed on the default branch (ascendc_pto) in a single day (09:36 to 16:29), in three groups:

  • Largest: #1753 (merged 16:29, 72 files, +10117/-3618, 26 commits): provides per-row max/min/sum implementations for compile-time shape-known FP32 inputs, and fixes two classes of auto-sync defects—earlier read/write records on the same data being displaced by later reads; incomplete wait handling when loops execute zero times, once, or nested. Also includes fixes for output slice out-of-bounds and insufficient scratch under threads=2. The T.reduce_max/min/sum interfaces are unchanged.
  • Correctness fix group: #1804 (merged 14:26, 2 files +335/-14, fixes #1263) fixes the bug where compute_strideN treated the entire buffer size as the row stride in row-slice scenarios—a C2 (8388608, 128) row slice yielded a stride on the order of 2^30, causing data corruption on 910B2 due to uint16 truncation; 13 test cases added; #1809 fixes the CV async read/write timeout issue in the block_sparse_mqa_attn example (fixes #1665).
  • Operator and docs group: #1621 adds an NPU-side mhc_pre operator example; fredrekelthen’s single-day docs series of 6 PRs (docstring refinements for sort, topk, transpose, add/sub/mul/div, max/min, select + dtype coverage tests + API docs), plus atomic_add documentation completion (#1587).

Assessment: landing “one major feature + one correctness fix group + one round of API documentation completion” all within a day makes this the repo’s densest merge day to date; the 6-PR docs series comes from the same author with uniform formatting, looking like a batch of wrap-up work done in one pass.

2.2 Ascend: The Verification Tail of a Batch Merge—Scheduled Job Fails, Two Follow-up PRs Opened (09-20/09-21)

Date: 2026-09-20 to 2026-09-21　Source: Ascend daily test failure issue #1817／#1816 automatic C/V attribution for pure Vector operators／#1815 PTO V2C LEFT_RIGHT serialization

The cost of the batch merge surfaced in the latter part of the window: the 09-21 06:01 (Beijing time) daily test report was a workflow-level failure (corresponding to a scheduled workflow started at 04:23, running on the #1753 merge point 5e6e1dfb). The previous passing report was 1936/1936 at 09-20 05:30—corresponding to the baseline before the merge wave.

Two follow-up PRs were opened within the window: #1816 (created 09-20 18:36, author platelett) explains that after #1753 began strictly checking Cube vs. Vector execution attribution, affected pure Vector operators and tests need TL_ASCEND_AUTO_CV_COMBINE enabled so the compiler automatically inserts scopes, and outdated test preconditions need cleanup; #1815 (created 09-20 11:17, author zwh1025) fixes a concurrent partial-write conflict in PTO’s Vector-to-Cube TILE_LEFT_RIGHT split when the per-AIV row width is not an integer multiple of 32 bytes (fixes #1661; NaN and Inf had appeared on Atlas A3 with fp16 K=16).

Assessment: after the big merge day, the chain of “merge, scheduled verification, follow-up fix” is operating normally, but neither follow-up is a new feature—both are collateral corrections triggered by the merge; a single-day merge on the scale of 11k lines brought verification risk downstream along with it.

2.3 Hygon: HCU Example Support PR Opened, Example Branch Created in Parallel (09-20)

Date: 2026-09-20　Source: tilelang-hygon #11 Enable TileLang example support

At 19:51 (Beijing time) the repo created the tilelang-examples branch, and at 20:02 new PR #11 was opened (author zy3223, 26 files +1072/-143, not merged): adapts autotune and LDS configuration, resolves kernel layout conflicts, switches GEMM to HCU matrix core built-in instructions, and adds regression coverage. Together with #10 (MLS buffer storage and prefer_async pipelining, merged 09-17), Hygon is at the stage of “getting the TileLang example suite running on HCU.”

2.4 MLIR Ascend: Mamba Operator and Agent Pipeline Model Selection (09-20)

Date: 2026-09-20　Source: tilelang-mlir-ascend #187 TileOPs reporting infrastructure／#188 Mamba operator and per-agent model selection

The MLIR Ascend adaptation repo landed two PRs in the window (both by lhw): #187 (landed 10:10, ~+5.4k/-112 lines, 40 files) brings TileOPs’ benchmarking and reporting infrastructure into the repo—report JSON/MD/HTML, Ascend-side profile scripts and report tests, etc.; #188 (landed 12:29, ~+4.2k/-68 lines, 36 files) adds an optimized Mamba operator and introduces “per-agent model selection” pipeline configuration (.agents/ evolution logs and .opencode/agents/ role definitions updated in sync, including Mamba benchmarks).

Assessment: this repo’s activity looks like using an AI agent pipeline to develop and adapt operators in bulk (pattern libraries, pitfall libraries, and reproduction cases are all in the version control); Mamba and the reporting infrastructure are sample outputs of this pipeline; for the “agent-driven operator development” direction, this is one of the more aggressive practice samples in the ecosystem today.

2.5 MetaX, Moore Threads, Sunrise: No New Commits in the Window (09-17 / 09-18)

Date: 2026-09-17 to 2026-09-18 (respective latest pushes)　Source: tilelang-metax／tilelang-musa／tilelang-sunrise

All three had no commits in the window: MetaX’s latest push was 09-17, Moore Threads 09-17, and Sunrise’s latest action remains the creation of candidate branch candidate/20126-public-release-pilot on the morning of 09-18 (no subsequent commits). No repo tags were updated.

III. Ecosystem and Adopters

3.1 Adopters: TileKernels and FlashQLA Had No Pushes in the Window (04-23 / 09-18)

Date: 2026-09-21 (verification)　Source: TileKernels／FlashQLA

Neither adopter had pushes in the window: TileKernels’ latest push remains at 04-23; FlashQLA’s last push was 09-18 (three SM100/SM120-related merges, already covered in the two weekend editions). The adopter side has been silent since Friday.

3.2 Community Project: TileLang-TPU Advances ChunkScan on the Sophgo TPU Side (09-20)

Date: 2026-09-20　Source: TileLang-TPU repo

A community project made two commits in the window: extending TileLang’s TPU backend for Sophgo accelerators (target="tpu", pcie and cmodel modes, the ppl_* DSL built-in series, full JIT flow), bringing the Mamba2-related ChunkScan chunked-scan operator to BM1690—the two commits being the cmodel pipeline and BM1690 PCIe hardware verification respectively. The project has few stars and is an early-stage exploration, but the direction is worth noting: TileLang’s third-party backends are extending toward more domestic chip lines.

IV. Community, Tutorials, and Events

4.1 Documentation Sites: One Automatic Deployment Each for the Main Repo and TileOPs (09-20)

Date: 2026-09-20　Source: Main repo docs site／TileOPs docs site

The main repo docs site had one “Update docs” automatic commit at 17:10; the TileOPs docs site had one gh-pages branch deployment at 07:58. Both are automated pipeline behavior, with no substantive site content changes.

4.2 Media and Academia: Zero Additions in the Window (09-21)

Date: 2026-09-21　Source: Google News RSS (multiple Chinese and English queries, via proxy)／Hacker News／arXiv

Google News Chinese and English query sets (TileLang, tile-ai, operators, domestic chip combinations, etc.) had zero hits in the window; Hacker News had no topic-related entries in the past five days; the latest arXiv topic search result remains the 07-24 TileSight performance model paper, with no new preprints in the window.

4.3 Release Cadence: Main Repo v0.1.14 Now 19 Days Old, Adaptation Repo Tags Unchanged (09-02)

Date: 2026-09-02 (latest release)　Source: tilelang v0.1.14

The main repo’s latest release remains v0.1.14 from 09-02 (now 19 days old); no new tags in the adaptation repos during the window: Ascend v0.1.2.000 (09-09), MLIR Ascend v0.1.2.020 (06-11), Moore Threads v0.1.14+musa.1 (09-11).

V. Trend Observations

5.1 ROCm Line: Stacked Delivery Begins to Converge—One Compressed Merge Brings the Whole Example Set into Mainline

The stack from #3250 to #3254 chained up in the previous window and was brought into mainline in one go by the top PR this window. The efficiency of stacked PRs shows here: review looks at the chain, and landing is the whole chain. The remaining issue is wrapping up the other four PRs in the chain—the content is already in main, and they need to be rebased or closed, otherwise four “misnamed” open PRs will linger in the queue.

5.2 NVIDIA Line: SM120 Enters an Hour-Level Response Cadence

From requirement issue #3256 (01:22) to patch #3257 (01:43) was a 21-minute gap by the same author, advancing around a specific downstream project’s (SageAttention3) blocker. This “downstream requirement to same-night patch” cadence indicates that SM120 block-scaled GEMM now has a clear owner and verification baseline (post-merge main head, sm_120a, torch 2.11).

5.3 TileOPs’ Trust Engineering: From Readings to Criteria to the Formulas Themselves

Across four PRs in three days (#2155 semantics, #1996 physics, #2154 provenance, #2158 formulas), metric governance has now gone through both “the numbers that are read out” and “the formulas that are written down.” The starting point was just an 8-line bandwidth anomaly, and the governance radius expanded to the formula assets of 175 operators—the lesson is the same: the credibility of a metric does not come from “looking reasonable,” but from “the version that runs being the same version that is declared.”

5.4 Ascend’s Batch Merge Day: Beyond the Gains, There Is a Verification Tail

After 11 PRs in a single day, with the largest at 72 files and 10k added lines, a scheduled job failure and two follow-up PRs appeared in succession within half a day—this is not an anomaly, but the inherent cost of a large merge (strictness changes affect existing kernels and test preconditions). Watch points: whether scheduled regression returns to all-green after the follow-up PRs merge, and whether the test case count moves up from 1936.

5.5 Gaps and Risk Points

Three points: first, the main repo’s release stagnation has reached 19 days, and cross-week items in the review queue (#3109, #3230, #2253, etc.) continue to accumulate; second, the k-pool stack content is already in main while the four open PRs remain unclosed, posing a duplicate-maintenance risk; third, Ascend’s scheduled regression failed after the batch merge and the follow-up fixes have not yet merged—for downstream users watching the “daily all-green” signal, today should be treated as red.

Appendix: Sources and Verification Notes

Source Verification Table

Source Verification Result
tile-ai org (28 repos) 8 repos had pushes in the window: tilelang, TileOPs, TileOPs-nightly, tilelang-ascend, tilelang-hygon, tilelang-mlir-ascend, tilelang.github.io, TileOPs.github.io (the latter two are site deployments)
Main repo tilelang default branch 1 merge (#3254, k-pool chain); 1 new issue (#3256) and 1 new PR (#3257); #3230 and #3109 updated; #3245 and #3247 no updates
TileOPs 1 merge (#2144); 3 new (#2158, #2159, #2160); remaining items had no updates in the window
TileOPs-nightly Two snapshots (0bedc999, f8c4081c): benchmarks up from 1040 to 1046, correctness at 1118, both with zero failures
Ascend 11 merges in a single day; scheduled job failure (#1817); follow-up PRs #1815 and #1816 opened
Hygon PR #11 opened (example support), example branch created
MLIR Ascend 2 landed (#187 reporting infrastructure, #188 Mamba operator and agent pipeline)
MetaX / Moore Threads / Sunrise No commits in the window, tags not updated
Adopters TileKernels and FlashQLA had no pushes in the window
Community projects TileLang-TPU (Sophgo BM1690 direction) 2 commits
Google News RSS (multiple CN/EN queries, via proxy) Zero new items in the window
Hacker News No topic hits in the past five days
arXiv Latest topic search result dated 07-24, no new preprints in the window
Doc sites Main repo doc site 1 automated commit, TileOPs doc site 1 deployment, no substantive content changes

Full Source List